Download Logic testing and design for testability by Hideo Fujiwara PDF

By Hideo Fujiwara

ISBN-10: 0262060965

ISBN-13: 9780262060967

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We can express h as a function of X: h(X). We can express the output function F as a function of X and It by considering It as an input. Let this function be F*; that is, F*(X, It) = F(X). To detect the fault It s-a-O, it is necessary to propagate the opposite value I to It and to propagate the difference of normal and erroneous signal values to the output of the circuit. Thus, the set of all tests that detect the fault It s-ais defined by the Boolean expression o Similarly, the set of all tests that detect the fault It s-a-l is defined by the Boolean expression J (X).

1, consider the fault h s-a-I, where It is an input of Gz . 3 will be expressed as a function o f Xl ~ F*(X,h) ~ X,X , X2' x 3 and II: + hx , where h(X) = x, . Thus, we have dF*(X,h) dh = XI X, = Ell (x , x, + x, ) {'ii , + x,)x, . The set of all tests that detect the fault h s-a-l is defined by the Boolean expression -( I) . dF*(X, h) ,X dh ( Hence, the fault h s-a-I is detected if and only if x , = 0 a nd x , = x, = 1. 3. The output is F(X) = x, + X, X , = x, + X , . 3. F can be expressed as a function F* of X and 1J: F*(X,h ) = x , + hx" where h(X) = x, , Th us, dF*(X, h) _ _ dh = x, Ell(x ,+x,) Logic Testing 30 The set of a ll tests tha t detect the fault Iz s-a- I is defined by Boolean exp ression - .

20 General test ing scheme testing. Although full duplication is the upper bound on hardware redundancy for fault detection and thus requires more hardware than other hardware-redundancy approaches, the duplication scheme can eas ily be adopted at any part of the computer system and at any level within the computer hierarchy. In the external-testing approaches, the circuit under test (CUT) is tested with automatic test equipment (ATE) in which a sequence of test patterns are applied to the CUT and the responses of the CUT are compared against reference values (correct responses).

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